A microprocessor executes a sequence of instructions stored in a memory. The sequence of instructions is often interrupted by urgent requests for service by a corresponding interrupt. These requests are serviced by the execution of their corresponding interrupt service routines. The main program flow that has been interrupted is interrupted at a particular state. The microprocessor must store its state of being prior to entering the service routine and then restore the state of being upon finishing the interrupt service routine. Prior to the initiation of the interrupt service routine, it was interrupted.
The microprocessor disadvantageously stores and restores its state of being in between the execution of a plurality of co-pending interrupt service routines when later multiple interrupts have occurred during the execution of another interrupt service routine. It is wasteful of processing time for the microprocessor to restore and then store its state of being when there are multiple pending interrupts because the microprocessor immediately initiates another pending interrupt service routine after completing the prior service routine.
One way to avoid the wasteful restore and store sequence is to check for the second interrupt in software. The first interrupt service routine examines an interrupt line and determines if there is a pending interrupt. The interrupt service routine would then initiate a second interrupt service routine without the need for a store and restore. This program sequence disadvantageously consumes time and decreases the efficiency of the interrupt service routines.